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Page 782 Index A access time, 345 accessing patterns, 428 adaptive speculation, 493 address generate, 65 generation dependency, 168 generation interlock, 242 interlock, 169 mapping, 443 addressing modes, 32 AGI, 242 aliases, 327 ALU, 47 Amdahl's law, 528 architecture, 4 area, 63 arithmetic class operations, 164 arrival distribution, 369 aspect ratio, 87 asymptotic I/O models, 611 asymptotic solution, 378 B bandwidth, 43 base and bound, 41 baseline microprocessor performance, 253 baseline microprocessor area model, 94 basic block, 161, 464 Berkeley protocol, 541, 755 binomial distribution, 368 bit data type, 18 bit strings, 14 bottleneck, 612 branch, 222-239 elimination, 225 prediction, 226 speedup, 225 table buffer, 224 target buffer, 236 target capture, 236 branch and link, 37 branch history, 229 branch performance, 209 branch prediction dynamic, 229 static, 227, 232 branch scope, 494 branch subsets, 464 branch-on-condition, 30 branch-on-count, 31 branches, 30 BTB, 236 buffer, 216, 384-394 design, 216 effect of, 215 for mean request, 216 primary path, 219 size, 384 target, 219 buffered closed queues, 382 bypassing, 449 C cache, 47, 265-341 copyback, 281 for baseline processor, 335 fully/partially/non-blocked, 396 index, 273 offset, 273 tag, 273 write-through, 280 cache access controller, 214 cache coherency protocols, 538-563 cache design considerations technology dependent, 317 cache directory, 273 cache hits, 266 cache misses, 266 cache references per instruction, 311 call depth, 128 canonic HLL instructions, 118 canonic measure, 134 capacity queue, 374 CAS, 352
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