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Enhanced DRAM (EDRAM) incorporates operational changes to the standard data bus and a multiplexed address bus controlled by RAS and CAS to increase the operating frequencies, and cycle by cycle efficiency of the standard interface. Particular attention has also been given to improve the performance of the row cache. EDRAMs provide fast access times and through intelligent design, hide precharge time during burst transfers. It is also designed so that writes do not need to disturb the row cache, and the interface is available prior to the actual completion of the DRAM write. The problems with EDRAMs are the limited number of suppliers, TTL signaling levels, and asynchronous interface. |
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Synchronous DRAM (SDRAM) conforms to the EIA/JEDEC JC42.3 DRAM standard. SDRAM retains the multiplexed address bus, but adds a high speed clock to synchronize all the required operations. For synchronous DRAMs, all timing is specified in terms of cycles of the chip operating frequencies instead of the delays (ns) in conventional DRAMs. SDRAM also employs a two bank scheme to improve the sustained bandwidth. The two bank scheme incorporates pipelining and alternates between the two banks to enhance the access time. |
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The secondary cache (SRAM) is placed on the DRAM ICs. Therefore, CDRAM is a DRAM with a small embedded SRAM. As a result, CDRAMs can be very fast with a cycle time of 10ns. CDRAMs can provide high peak bandwidth, since some overlapping of SRAM and DRAM operations can occur. CDRAM also provides a low latency access without the high cost of a discrete secondary cache. However, incorporating a cache greatly complicates the tasks of the memory controller. |
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Rambus is a small company founded in 1989 to develop a new high bandwidth DRAM interface. Their design abandons the conventional pin-level interface: separate data bus and multiplexed address bus. A single byte-serial bus transfers control, addresses, as well as data. Rambus specifies both physical (wire length) and electrical characteristics of the interface so that incorporation into a system requires conformance to their new interfaces. Rambus provides the following features: |
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Vertically mounted DRAMs. |
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