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Figure 1.24
A simple virtual (32-bit) to real mapping, producing a 24-bit physical
address. The user ID comes from PSW or a related control register. |
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address in memory, as well as the other bits of the virtual address that have been mapped into this particular location. These residual virtual bits must be compared to the corresponding bits of the virtual reference to ensure that the correct entry has been selected. Since multiple virtual addresses map into the same TLB location, references may occasionally fail to be properly translated, indicated by an invalid comparison. This causes a TLB fault or a not in TLB action to occur, which requires an access to each of the tables in memory and the formation of a correct virtual-to-real translation for that particular virtual address. |
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Figure 1.24 shows a simple virtual to real memory mapping using a 32-bit process effective address. Each user has an ID, an identifier given to it by the system, which acts as an overall "base" for that user's address space. The user ID defines a base register. This register is pointed to by the PSW. The user ID contains a base address that defines the starting point for the segment table belonging to this particular user. For the simple example shown in Figure 1.24, we assume that the user has one-megabyte segments. With a 32-bit address space, there are 212 = 4,096 user segments. The upper 12 bits of the user virtual address define one of the user segments. The addition of these upper 12 bits to the 32-bit base address specifies an entry into the segment table that is contained in memory. The segment table, as previously described, contains a base address and a bound for |
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