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Figure 5.5
Fully associative mapping.
CPU produces a virtual address from the AG function. The lower 12b (4K pages) of the virtual address are the same as the real address.
Example:
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24b real address (real memory size 16MB)
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8B physical word
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4KB cache
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64B line
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\ 64 line (4K/64) in cache
Steps of operation:
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1. Translate VPN to RPN with TLB.
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2. Access the cache directory, then the cache.
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3. Access cache with addr from the directory index and offset 9b bits.
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4. If compare valid, enable data to go to processor.

 
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