13. (a) A branch table buffer (BTB) can be accessed while the branch is decoded so that the target address (only) is available at the end of the branch decode cycle.
For an R/M machine with BTB and timing template as shown in the preceding (one decode each cycle), what is the BR penalty and the BC penalty in cycles? (Assume that all of the BRs and 50% of the BCs hit in the BTB, that 80% of those BC's that hit are actually taken, and that 20% of those BC's that did not hit were actually taken.)
(b) If target instructions are placed directly in the BTB, what is the penalty for BR and for BC in cycles (same assumptions as (a))?
14. Estimate the value (in CPI) of a small BTB for our baseline processor (without branch adder).
Assume a 64-entry BTB (containing target instructions) and a scientific environment (use Table 4.14). Assume a BTB hit actually goes to target 80% of the time and a BTB miss goes in-line 80% of the time.
15. A BTB can be used together with history bits to determine when to place a target in the BTB. This might make small BTB's more effective. Below what size BTB would a 2-bit branch history approach be attractive (for the scientific environment)?