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These examples do not reflect the variation in mnemonics, but only a few variations in operand specification. The preceding instructions take three arguments: two source and one destination. This is not always the case; many times it is necessary to duplicate one of the arguments because the two-argument instructions are really of the form B = B + C, which generates a similar result (B + C), but destroys one of the arguments (B, the first source) in the process. This kind of result is typical of the R/M machine type, and the three-argument instructions are typical of the L/S machine type. Many R+M machine types have both two- and three-argument instructions. |
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The latest attempt to standardize the assembly language mnemonics is the IEEE Working Group for IEEE P694 [26],9 which, like its predecessors, has not met with much success in the industry. There are several reasons for this. A standard removes much of the distinction between different machines. Certainly, the actual set of implemented operations would be different, but a careful programmer might never have to know what machine was being worked on. This could be a marketing crisis! Another problem is that there really is no accepted core of operations. Certainly, addition, multiplication, etc., are present in any machine, but some machines implement combined instructions (the VAX ACBW combines an addition (16 bits), a comparison, and a branch all in one instruction!), register sets are varied in number, nomenclature, and qualities (some machines even implement a register set organized as a stack of register subsets to improve context switch performance), and so on. Each machine (at the assembly level) is very different, making a standard a herculean task. |
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1.5.3 General Machine Conventions |
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This book follows the spirit of the proposed IEEE standard mentioned before. We define only a few basic operation mnemonics. This will, hopefully, provide a clear understanding of the intent of the examples as well as instill a sense of simplicity that the reader may remember as the proud parent of a new processor instruction set. |
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The convention followed in this book is simple. Instruction mnemonics consist of an operation and a data type specification concatenated together with a "." separating the two portions of the mnemonic for clarity. Thus, an integer word addition is written ADD.W (or simply ADD, if there is no ambiguity) and a floating-point multiplication is written MPY.F. A similar format is used for branch conditions in place of the data type specification, so that a branch on less than or equal to would be written BC.LE. The mnemonics and modifier fields are chosen for simplicity and would, of course, be more complicated if the instruction to be represented were: |
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multiply the sine of the first operand by the arctangent of the second operand and add it to the contents of the destination operand, branching on less than or equal to the value of the third operand to a target address continued in the fourth operand. |
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For the most part, the mnemonics used in this book are limited to the ones listed in Tables 1.10, 1.11, and 1.12. Special cases are explained in the text when required. These tables are not intended to be complete. They |
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9Not to be confused with the IEEE floating point standard, STD-754-1985. |
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