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Table 1.8 A list of the principal ADD instructions found in MIPS machines (L/S).
ADD
Add 32b integers
ADDU
Add 32b unsigned integers
ADDI
Add integers using an immediate operand
ADDIU
Add unsigned integers using an immediate operand
ADD.S
Floating-pointsingle precision
ADD.D
Floating-pointdouble precision

Table 1.9 Some mnemonics for an ADD instruction. (The purpose is to add two integer words contained in two registers, R1 and R2, and put the result in R1.)
S/390ARR1, R2
MIPS Co. R2000ADDR1, R1, R2
VAXADDL2R2, R1
Intel 80386ADDEAX, EBX
M 680x0ADD.LD2, D1

1.5.2 Instruction Mnemonics
Another problem in analyzing machines is that the instruction mnemonics, or assembly representation, are even less consistent than operations. For example, one early machine8 used the mnemonic TAD to represent subtraction because it emphasized the number representation in use on that machine. (In a two's-complement number system, subtraction can be thought of as Two's complement ADdition.) Most machines use a variation of SUB for SUBtraction.
Unfortunately, although there have been several attempts, no standard for instruction set mnemonics has been adopted. Each vendor uses its own assembly language syntax, often creating obscure glyphs for no particular reason. Sometimes, as with the Intel 8080, the mnemonics have been copyrighted, making compatibility or even similarity subject to copyright infringement.
Not only are the mnemonics inconsistent (Table 1.9), but some machines have adopted the convention that the destination is the first parameter, while others have adopted the convention that the destination is the last parameter. A few have even tried to define algebraic-like assembly language constructs. A few examples of instructions implementing the simple addition A = B + C follow:
Example 1:
ADDA, B, C
Example 2:
ADDB, C, A
Example 3:
A = B + C

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8The DEC PDP-8.

 
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