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Consider now what happens when the BTB contains target addresses only: |
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Again, there is no branch delay on correctly guessed branches. With the above template, it is only necessary to have addresses in the BTB. Of course, this depends on the particular timing template. |
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Figure 4.25 shows the tree of possible outcomes. The expected delay for branches can be computed as shown in the following study. |
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Study 4.8 Branch Target Buffer |
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What is the delay due to a branch instruction? |
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First, we represent the outcome tree: |
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Next, we sum up the expected outcome delay: |
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(.6)(.8)(0) + (.6)(.2)(4) + (.4)(.2)(5) + (.4)(.8)(0) = 0.88 cycles. |
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Note that without the BTB, if we had simply guessed in-line, we would have a significantly larger penalty. |
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Assume that the in-line delay is 0, while the target delay is 5 cycles: |
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Expected delay = .44(0) + .56(5) = 2.8 cycles. |
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