|
|
|
|
|
|
The grander the descriptions of an instruction set, the more suspect the results. Nowhere is this more true than in an evaluation of instruction sets. Consider the following description of the Intel iAPX 432 system [145], a processor with an extremely complicated instruction set: |
|
|
|
|
 |
|
|
|
|
The vacuum tube, the transistor, the microproces´sorat least once in a generation an electronic device arises to shock and strain designers' understanding. The latest such device is the iAPX 432 micromainframe processor, a processor as different from the current crop of mPs (and indeed, mainframes) as those devices are from the early electromechanical analog computers of the 1940's. |
|
|
|
|
|
|
|
|
|
Hemingway and Grappel, Electronic Design News, Apr. 29, 1981 |
|
|
|
|
|
|
|
|
|
If truth be told, the comparative effect of instruction sets, given correspondingly good implementations, is rather limitedusually less than a factor of two and certainly less than a factor of three to one. It is, however, possible to define an instruction set processor that will "shock and strain designers' understanding," creating a bad mismatch between the instruction set and the implementation technology. The result is usually a big disappointment. |
|
|
|
|
|
|
|
|
|
Contrast the preceding quote with the following remark: |
|
|
|
|
|
|
|
|
|
Since the development of the stored-program computer around 1950, there have been remarkably few true Innovations in the areas of computer organization and architecture. One of the most interesting and potentially one of the most important innovations is the reduced-instruction-set computer (RISC). The RISC architecture is a dramatic departure from the historical trend in CPU architecture and challenges the conventional wisdom expressed in words and deeds by most computer architects |
|
|
|
|
|
|
|
|
|
W. Stallings, "Reduced Instruction Set Computer Architecture," Proc. IEEE, Vol. 76, No. 1, January 1988 |
|
|
|
|
|
|
|
|
|
The real issue for processor designers is not so much the intrinsic differences among instruction sets, but rather the correspondence between a particular instruction set and the implementation technology at hand. In the world of microprocessors the question is a simple one: is there enough silicon available to fully implement the required processor functions and provide various support features such as buffers and cache? |
|
|
|
|
|