|
|
|
|
|
|
|
Figure 2.37
Basic performance constituents. |
|
|
|
|
|
|
|
|
mainframeshence the concern with instruction set cost-performance optimization. With larger chip areas available for microprocessor implementation, other related issues such as cache size and effectiveness become more pressing. |
|
|
|
|
|
|
|
|
In the next section, we examine efforts at: |
|
|
|
|
|
|
|
|
1. Instruction set comparisons. |
|
|
|
|
|
|
|
|
2. Evaluation of differences in instruction sets. |
|
|
|
|
|
|
|
|
3. Limits and tradeoffs in instruction set design. We especially look at the optimization of the instruction set code density and the tradeoffs in the register-cache system as a function of die area. |
|
|
|
|
|
|
|
|
Program execution requires a certain number of processor cycles. The size of a cycle and the number of cycles are primary metrics for machine performance. Unfortunately, it is difficult to predict a priori the effects of a particular design choice on cycle time or the number of cycles. We try to manage this problem by creating a processor model in which we can separately examine certain dimensions of the overall processor design space. Three important constituents of performance (Figure 2.37) are: |
|
|
|
|
|
|
|
|
1. The instruction streamthe dynamic activity of the instruction set in the execution of a program. |
|
|
|
|
|
|
|
|
2. The data streamthe dynamic activity of data accessing during the execution of a program. |
|
|
|
|
|