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2.6 Instruction Sets: Processor Evaluation Metrics |
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The instruction set of a processor represents the processor as a user sees it. Instructions define actions, which are partitioned into cycles. The sum of all these cycles represents program execution. |
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There are four basic issues that determine overall program execution time: |
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1. The cycle time. This is primarily a function of the implementation technology and secondarily a function of the instruction set and the size of the units specified by it (register set size, floating-point capability, etc.). |
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2. Cache and memory size and bandwidth. This is primarily a function of the available chip area and the number of chips involved in the implementation. Secondarily it also is a function of the instruction set. |
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3. The per-instruction execution timethe CPI or number of cycles per instruction. This is primarily determined by the definition of the cycle and the requirements of the instruction set. It is closely related, however, to the average memory access time, which is determined by cache size and/or memory configuration. |
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4. Number of instructions required to execute a program. This is determined by the instruction set and the compiler. |
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The instruction set, then, is the fabric that brings together cycle time and area into a general model of processor performance. There are probably few areas within the computer systems field that create as much controversy as the relative merits of one particular instruction set selection vs. another. Even when purely economic issues such as compatibility, design time, etc., are ignored, controversy still existsas witnessed by discussion a few years ago of the RISC versus CISC (reduced vs. complex instruction set computer) approaches [270, 193]. Even from a technical point of view, there are many decisions involved in creating an instruction set and an implementation. Moreover, it is difficult to isolate a single factor as being primary in determining performance or cost. A machine is measured in many different ways, and its overall effectiveness depends on all aspects of the systemprogram size, number of instructions, cycle time, cycles per instruction, and cost (effective use of hardware). Even after the design is complete, the compiler technology plays a dominant role in determining the effectiveness of the features included in the machine. |
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The issue is not one of simply adding useful features to the instruction set (e.g., more registers), but of making those marginal additions to a machine that realize the best performance per unit of cost. Within a chip, this can be expressed as an area optimization problem: given a marginal increase in area on a base design, what is the best use of area in terms of performance? For a microprocessor, the penalty for using more area than can be accommodated on a single chip is severe, often doubling the cost. In a multichip "mainframe" machine, the additional cost for adding a feature may be more manageable. It is not surprising that the notion of marginal utility of a feature has been much more important in microprocessors than in |
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