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Page 750 Table D.1 Chip Level Comparisons EDRAM SDRAM CDRAM RDRAM RAMLINK Vendor Nippon Steel NEC,Samsung Mitsubishi Mitsubishi Samsung Toshiba NEC Fujitsu None Pin-level Interface Enhanced Asynchronous RAS/CAS Synchronous RAS/CAS Synchronous RAS/CAS and SRAM address High-speed Synchronous 9-bit bus High-speed Synchronous 8/9 bit ring Packagea 28 SOJ 50 TSOP 44 TSOP 32 SVP unspecified Size 4Mb 16 Mb 4Mb 4Mb unspecified Organization x1, x4 x4, x8, x9, x16, x18 x4, x16 x9 unspecified Row-Cache 1 row x 2Kb 1row x 4Kb 256 x 64 2 row x 9Kb unspecified Row Access Time 35 ns 70 ns 70 ns 152 ns unspecified Row Cache Access Time 15 ns 30 ns 10 ns 36 ns unspecified Peak Per-pin Bandwidth 66Mb/s 100Mb/s 500Mb/s 500Mb/s Peak Device Bandwidth 264Mb/s 800Mb/s 500Mb/s 4.5Gb/s 4.5Gb/s Supply Voltage 5v 3.3v 5v, 3.3v 5v unspecified Interface Voltage TTL LVTTL TTL,LVTTL RSL LVDS aPackaging terms: SOJsmall-outline J-lead package. TSOPthin, small-outline package. SVPsurface vertical package.
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