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Page 687
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Figure 10.9
Multiprocessor block diagram.
Pipeline specifications (study 4.11):
Instruction type
ALUIFD/RFEXPA
LD/STIFD/RFAGPA
BR/BCIFD/AGTIF

Superscalar specifications:
2 integer ALUs.
Pipelined FP unit.
1 branch adder.
1 L/S unit.
Register file with 2 Read and 2 Read/Write ports.
Additional bypassing muxes.
Doubled instruction buffer size.
Doubled decoder hardware size.

 
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