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Figure 10.3
Tradeoff between reduced-scale and super-pipelined illustrated
learning curve. |
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By looking over the calculations performed, it does not seem immediately clear which processor is the better choice. While the cost per chip for the reduced-scale processor is $496.8, the cost per chip for the super-pipelined CPU is $550.5 (roughly 10% more). On the other hand, the super-pipelined processor outperforms the reduced-scale with CPIs of 2.492 cycles and 2.622 cycles, respectively. By combining the two factors (cost and performance), we may be able to determine which processor to invest in. So we find the cost-performance product of the reduced scale to be 1302.6 $-cycles, while that for the super-pipelined is 1371.8 $-cycles. We may then conclude, on this basis, that the reduced-scale processor would be a better investment. Some further analysis may prove otherwise. If one considers the effect of the learning curve on the design process, then after some amount of time (in a year's time, maybe), the cost-performance of the superpipelined processor may be less than that of the reduced-scale. Consider, for example, a 10% decrease in defect density/month. Then, according to Figure 10.3, in less than a year's time, the super-pipelined will turn out to be a better choice. Then again, in this business, both processors may be obsolete in a year's time! |
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Several questions must be considered before making a final choice of processors: what is the technical difficulty of designing, verifying, fabricating, and testing these parts? What changes might be made to the system in the future that might change the outcome? What are the scalability considerations between the two processor designs that might affect future performance enhancements? |
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While the reduced scale processor is already scaled down in feature size, the super-pipelined processor has much tighter timing constraints and is potentially more affected by unwanted clock skew than is the reduced-scale processor. The greater sensitivity to clock characteristics in the superpipelined processor requires more careful design and simulation during development to ensure that the design can be reliably fabricated. With |
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