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8.20 Some Areas for Further Research |
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There is probably no area of computer architecture that has as many open issues as the efficient use of multiprocessors. Almost every area discussed in the chapter, and many (especially in the software and language area) that we have not covered, have a long list of open issues. The partitioning and scheduling problems are known to be "hard problems." There is no known simple universal solution. Progress is made incrementally by using increasing amounts of program information either from compilers (hints as to expected behaviors) or from prior runs of programs (adaptive scheduling). |
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Areas such as coherence and processor interconnect are relatively easier problems, not that creating a robust and efficient protocol is an easy problem. At this time, the SCI seems to be an evolving standard coherency protocol. It is not clear that this is the most efficient protocol, but as with most things, it is usually possible to incrementally improve the efficiency of a hardware approach once its limitations have been fully identified. The great advantage of SCI is that it has received sufficient attention so that most of the hazards and races which occur in the protocol have been identified. |
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There are open problems in all these areas, and the reader should bear in mind that in this chapter we have just looked at shared memory multiprocessors as relatively small numbers of processors. Finer-grain processing opens a new vista of problems. |
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8.21 Annotated Bibliography |
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Multiprocessors have been around for a long time, even in configurations of 16 or more processors. (Univac LARC and Bell Labs Sentinel system are examples from the 1960s.) A good early state-of-the-art reference is by Enslow [86]. Another important early book on interconnection networks is by Wu and Feng [313]. This collects a number of the important earlier papers in the area of networking. There have been a number of valuable survey papers on hardware and software issues in shared memory multiprocessors by Milutinovic and his colleagues [236, 278, 284, 286, 287]. |
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In developing the material in this chapter, the following papers were particularly useful: |
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The works of Bhuyan and Agrawal [36, 37] on the performance of interconnection networks. |
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Agarwal's [6] and Dally's [64] work on the evaluation of various types of interconnection networks. |
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Papers on the RP3 by Pfister et al. [232] for their early work on interconnection modeling, and by Pfister and Norton for their identification of hotspots [233]. |
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A great deal of work has been done on cache coherence; a few of the more important papers are Dubois [79, 80, 81] and Archibald and Baer [21]. Among recent books that cover development in the area of multiprocessors are the books by Hwang [138], Suzuki [274], and Tomasevic and Milutinovic [285]. |
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