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| Table 7.2 Simple address mapping. |
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Simple address mapping, as shown in Table 7.2, may be helpful in reducing contention in mod 2k memories in mixed application environments. It reduces contention for simple array access patterns for some common strides. However, in applications involving significant matrix manipulations, the stride problem may resurface, since the same strides are likely to create recurrent patterns of bits (the same values of Xi, Xj, and Xk, in the example). Thus, while hashing is usually sufficient, the use of hashing in conjunction with mod 2k + 1 mapping provides the best address distribution across a variety of applications and strides. |
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A memory system for use in vector/matrix accessing would then consist of (Figure 7.17): |
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2. 2k + 1 memory modules. |
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The overhead associated with this vector memory should not be excessivethe hashing function takes one or two gate delays, while the module address determination requires about two serial bit "additions." This may add an extra cycle to the memory access, but since the purpose of the memory is to access vectors, this cycle can be overlapped in most cases. |
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7.3.2 Modeling Vector Memory Performance: The Gamma (g)-Binomial Model |
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In a vector processor, we design for multiple simultaneous requests to memory. While access to memory (loading and storing the vector registers) can be overlapped with vector execution, a problem arises if the memory cannot keep up with the vector execution rate. |
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