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Figure 5.53
Cache configuration. |
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For the D-cache, we select: |
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no allocate on write
Write-through |
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In selecting random replacement (RAND), we should adjust the miss rates upward by about 12%. Our evaluation is also affected by our degree of association. Miss rate is increased by 15% for two-way associative cache. |
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Thus, the effec tive miss rates are now: |
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(Miss rate) ´ (adjustment for RAND) ´ (adjustment for associativity). |
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0.03 ´ 1.12 ´ 1.15 = 0.039. |
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.044 ´ 1.12 ´ 1.15 = 0.057. |
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Each cache is organized as in Figure 5.53. |
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Processor performance with cache and six-cycle miss penalty is: |
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2.82 + 0.73 ´ .039 ´ 6 + 0.34 ´ 0.057 ´ 6 = 2.82 + .29 = 3.11 CPI. |
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