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| Table 1.14 Conventions used in this book: branches. |
| | BR | Target (an unconditional branch to the instruction contained in target). | | BC | Target (a conditional branch without a specific condition code indentified). | | BC.CC | Target (same as BC). | | BC.NE | Target (a conditional branch with a condition code specified). | | BCT.NE | R1, Target (a conditional branch used for loop control. A count in R1 is decremented; if the result is ¹ 0 control goes to the target). | | BAL | Target (an unconditional branch that saves the current IC in an implied register). | | BALR | Rtarget (same as BAL except that the target instruction location (address) is contained in Rtarget). |
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Branches (sometimes called jumps) determine program control flow. We distinguish between unconditional BR and conditional BC, since this represents an important timing difference in our later analysis. The BC tests the state of the condition code, or CC, which consists of (usually) four bits that reside in the program status word (PSW) described later. We assume that the condition code is set by each ALU instruction (some machines cause even load and store instructions to set the CC); see Figure 1.15. The condition code also records one of four results (encoded in four bits); that is, specifying whether the condition setting instruction had generated: |
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4. A result that overflowed. |
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Conditions of interest to us are presented in Table 1.12. Branch conventions are outlined in Table 1.14. |
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Clearly, we could construct BR from BC.T using the BC instruction (i.e., BR is the same as BC.T). We choose to explicitly distinguish between these instructions, as they each have significantly different timing implications for a design. |
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In supporting the branch-on-condition instruction, most architectures include a group of compare instructions (CMP), which simply compare two values, either both in registers (L/S) or various combinations of operands in register and in memory (in the R/M or R+M architectures) to force the setting of a condition code. The compare instruction is an arithmetic compare (it interprets the sign bits), whereas compare logical is a logical, or unsigned, comparison (CMP.U) that treats operands as unsigned quantities. |
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