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Figure 5.17
Possible write strategies. |
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Suppose the store reference is initially not found in the cache. We can either bypass the cache and store only in memory, or we can allocate the line to the cachecause a missand then write into the cache. These write replacement policies are designated: |
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"No allocate on write" or |
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respectively. Neither policy has a distinct advantage over the other with respect to miss rate. |
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Usually, write-through caches use the "no allocate" policy, while copyback caches use "write allocate" based on memory considerations (Figure 5.17). |
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An important consideration in write policy selection is the effect of the decision on memory traffic. Selecting a write-through cache results lower memory traffic with small caches, while selecting a copyback cache results in lower memory traffic with large caches (Figure 5.18). Memory traffic usually is measured by the memory traffic ratio, which is simply the ratio of actual memory references (cache + processor) to processor memory references (assuming there was no cache present). |
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The following example shows a crossover point between two write policies. |
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EXAMPLE 5.1 EFFECTS OF WRITES ON MEMORY TRAFFIC |
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An integrated cache with two references per instruction (one I reference, one D reference). The data (D) references are divided: 68% reads, 32% writes. |
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Compute the memory traffic for a 5% miss rate for each: |
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