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| Table 4.12 Choosing strategies. |
| | Opcode +Mode | Best Static Strategy | Cycles Penalty | In-line Strategy | Cycles Penalty | | BRR | target | 0.01 | target | 0.01 | | BCR | in-line | 0.05 | in-line | 0.05 | | BR | target | 0.07 | target | 0.07 | | BC | in-line | 0.23 | in-line | 0.23 | | BALR | target | 0.02 | target | 0.02 | | BAL | target | 0.08 | target | 0.08 | | Loop control | target | 0.06 | in-line | 0.10 | | | 0.52 CPI | | 0.56 CPI |
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Figure 4.23
Branch target buffer (BTB) organization. |
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4.5.4 Branch Target Capture: Branch Target Buffers |
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The branch target buffer (Figure 4.23) captures the target instruction (or at least the target instruction address after a taken branch). Each branch target buffer (BTB) entry has three fields: the address of a previously executed branch instruction, branch prediction information, and the most recent target instruction or target address for that branch. (The target address is not necessary for predictive purposes, but is valuable because it enables the initiation of the target fetch earlier in the pipeline, since it is not necessary to wait for the address generation to complete.) The BTB functions as follows: the instruction fetch stage compares the instruction address to the instruction addresses in the BTB If there is a match, then a prediction is made as to whether the branch is likely to be taken. If the prediction is that the branch will occur, then the target instruction is used as the next instruction. When the branch is actually resolved, at the execute stage, the BTB can be updated with the corrected prediction information and target, |
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