|
|
|
| Table 4.11 Percentage correct guess using history of past n branches [181]. | | | | n | | | | | | 0 | | | | | | 1 | | | | | | 2 | | | | | | 3 | | | | | | 4 | | | | | | 5 | | | | |
|
|
|
|
|
|
much higher than the accuracy using only the branch opcode prediction strategy of Table 4.8. Third, the effectiveness of prediction varies significantly among the workloads. |
|
|
|
|
|
|
|
|
Figure 4.22
Dynamic branch prediction using branch history. |
|
|
|
|
|
|
|
|
In the following study (4.6), we look at a static branch prediction strategy coupled with a simple I-buffer. |
|
|
|
|
|
|
|
|
Study 4.6 Simple I-Buffers and Static Branch Prediction |
|
|
|
 |
|
|
|
|
Assumptions: |
|
|
|
|
|
|
|
|
In this study (and in some of the following studies), we slightly alter the template of study 4.2 to include a two-cycle AGperhaps one cycle for effective address generation and one for translate. Otherwise, we follow the general architecture of the R/M machine as used in studies such as 4.2. The significant new assumptions made in this study include: |
|
|
|
|
|
|
|
|
1. We now introduce an I-buffer of sufficient size to avoid runout. Thus, we generally ignore the IF cycles for in-line instructions. Of course, any unpredictable delay such as TIF that directly affects machine timing must be evaluated. |
|
|
|
|
|
|
|
|
2. In conjunction with the I-buffer, the decoder now predicts the outcome of a branch and issues instructions in anticipation |
|
|
|
|
|
