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The Role of Formats in Dynamic Instruction Count
More formats in an instruction set generally result in fewer instructions executed; fewer formats result in more instructions required to execute a program. The ratio 100:90:60 illustrated in Table 3.3 for relative instruction count across the L/S-R/M-R+M instruction sets seems to be well validated across many scientific environments. Whether additional instructions necessarily imply additional execution time is a much more problematic and debatable issue. For example, the additional instructions in a L/S program required because of its limited format are generally load and store instructions, which can be quickly executed. The instruction count using the R+M instruction set has been reduced by eliminating the need for load and store instructions. The instructions remaining are more formidable functional instructionsadd, multiply, etc.that consume a good deal of program execution time.
While execution time does not necessarily scale with dynamic instruction count (at least directly), there are secondary issues relating to code density such as cache efficiency which must be taken into consideration. We saw some of these effects in Chapter 2 and will again see these effects arise in Chapter 5.
Notice that the trend in L/S architectures is to increase instruction set vocabulary and improve register allocation. Both can significantly improve L/S dynamic instruction behavior.

Table 3.5 Expected Gibson classification profile for commercial (Cobol) applications by architecture type; see text for L/S assumptions. Character includes byte and variable length operands. Expected instructions executed per 100 HLL operations.
Commercial
L/S
R/M and R+M
See Table
Move (integer)
75
(11%)
28
(15%)
3.16
Move (character)
364
(53%)
16
(9%)
3.16
Branch
138
(20%)
72
(40%)
3.10
Decimal
46
(7%)
13
(7%)
3.14
Fixed Point
15
(2%)
15
(8%)
3.14
Shift, Compare, Logical (word)
15
(2%)
15
(8%)
Test, Compare, Logical (character)
35
(5%)
22
(12%)
688
181
99%

 
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