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Figure 2.51
The effect of register allocation on register traffic [206]. |
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Figure 2.52
Expected data traffic relative to a 16-register R/M
processor with global allocation for several architectures [206]. |
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(Figure 2.51).Clearly, the best allocation serves to make the best use of available resources. |
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It is in the area of register set size and the resulting effectiveness of register allocation that the behavior of contemporary computer architecture is changing. |
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The Intel x86 series has few registers (8), with perhaps 3 or 4 available for use by the allocator. While allocation for the x86 is very important, since registers are a scarce resource, there is a limit to what can be done. Mainframes have 16 registers, with 8 or so available to the allocator. Global allocation is very helpful, and interprocedural allocation helps even more, but L/S architectures with 32 registers profit the most from advanced allocation techniques. Therefore, it is no surprise that these processors have led the way in introducing interprocedural allocation. These trends are shown in Figure 2.52. |
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