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From studies such as the preceding, the following observations can be made concerning code density and instruction sets: |
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1. As more area becomes available to a designer, denser architectures tend to outperform less dense architectures unless the processor is limited by the time through the I-decoder itself. |
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2. Once area is available for an I-cache, it is important to reexamine the instruction representation and the code density issue. |
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The Value of Code Density |
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The design of instruction format was straightforward since we religiously adhered to a maxim given in the first working document on MIPS-X. It stated: "The goal of any instruction format should be: (1) simple decode, (2) simple decode, and (3) simple decode." Any attempts at improved code density at the expense of CPU performance should be ridiculed at every opportunity. |
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P. Chou and M. Horowitz, "Architectural Tradeoffs in the Design of the MIPS-X," Proc. 14th Int'l. Symposium on Computer Architecture, pages 300308,1987 |
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It may be perfectly correct to religiously follow a principle within the context of a particular project, but it does not mean that that principle is universally applicable or even useful in another project. |
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Observers who discount the importance of code density fail to realize the cost of not having it. The demise of Intel x86-based microprocessors has not happened in anywhere near the schedule that was predicted by L/S or RISC instruction set advocates. Part of the reason is that the size of the instruction decoder and its complexity can be outweighed by resultant code density and improved cache performance. |
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Eventually, changes will come to the x86; but (it would seem) these changes will reflect the need for additional address capabilities (a "64bit" address) and, particularly, for additional registers. |
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2.6.5 Role of Registers, Evaluation Stacks, and Data Buffers |
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In this section we look at the tradeoff between register set size and organization and required memory traffic (Figure 2.44). |
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The simplest form of data buffer is a first-in-last-out stack (evaluation stack). This has been commonly used in computer architecture [122] and, with three or four entries, can usually capture most temporaries that are evaluated within statements. For example, the statement |
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