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1. Access time to cache.
2. Access time to a register set.
3. Register set access plus ALU function time.
4. Instruction decode time.
Given the functional unit delays and clock times, we can begin the process of pipeline partitioning, as discussed earlier in this chapter.
2.6.2 Instruction Set Comparisons
Intelligent conclusions about a particular design decision cannot be made until that choice is evaluated. We begin by comparing instruction sets.
Some of the earliest attempts at instruction set comparison developed the notion of overhead instructionsinstructions that appear in the object code because of architectural considerations, not because of any algorithmic or source-level requirements. For example, load and store instructions typically are overhead instructions, while add and multiply instructions, corresponding to actions in high-level languages, are not. Instructions can be grouped into classes [91]:
1. F-type, or functional, instructions that transform data (such as ALU-type operations). These generally correspond one to one to actions specified by higher level languages.
2. M-type, or data movement, instructions that position data for later use (e.g., Load or Store). For many programs, these instructions are required by the instruction set, not the source program.
The ratio of the occurrence of overhead instructions to the occurrence of functional instructions defines one measure of the overall effectiveness of an architecture, the M-ratio. The M-ratio is the ratio of data movement instructions (overheadnot required by the high-level language) to functional instructions:
0112-01.gif
For S/370, the M-ratio was 2.9 (Flynn [91]), while for DEC-10, the M-ratio was 1.6 (Lunde [187]).
P-type, or procedural, instructions can also be defined to include those instructions that alter or modify instruction sequencing (branches, calls, etc.). Similarly, a P-ratio can be defined as follows:
0112-02.gif
A breakdown of M, F, and P instruction class frequencies and ratios averaged over many programs for some vintage (early 1970s) architectures is given in Table 2.5.

 
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