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Figure 1.8
Generic and actual architectures. |
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Processor design issues are closely bound to the instruction set. Instruction set analysis data based on existing machines affects many of these design issues. However, innovative processor designs are constantly being introduced into the marketplace. These may be based on existing instruction sets, on extensions to existing instruction sets, or on entirely new instruction sets. In order to provide an analysis in the face of changing instruction set details, three generic instruction approaches are described. This avoids dealing with machine artifacts and peculiarities and still allows the presentation of data representative of different architecture types. These generic approaches have a recognizable correspondence to the marketplace: they share features of many available machines, both mainframe and microprocessor (Figure 1.8). |
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Consistent with most modern machines, each of these generic approaches is based upon a register set to hold operands and addresses. Among processors of general interest, the register set size varies from 8 to 32 words, each word consisting of 32 bits. For our generic processor approach, when floating-point arithmetic operations are available in the architecture, an additional set of floating-point registers is assumed to be also available. In early microprocessor architectures, the floating-point registers and associated floating-point execution hardware were provided as a coprocessora separate chip with close coupling to the microprocessor. More recently, mi- |
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