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The processor can sustain only a limited number of outstanding memory references before it suspends processing and the generation of further memory references. This can happen either as a result of logical dependencies in the program or because of an insufficient hardware buffering capability for outstanding requests. The significance of this is that the achievable memory bandwidth is decreased as a consequence of the pause in the processing, for the memory can service only as many requests as are made by the processor. |
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Examples of logical dependencies include branches and address interlocks. The program must suspend useful computation until an item has been retrieved from memory. |
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Associated with each outstanding memory request is certain information that specifies the nature of the request (e.g., a read or a write operation), the address of the memory location, and sufficient information to route requested data back to the requestor. All this information must be buffered either in the processor or in the memory system until the memory reference is complete. When the buffer is full, further requests cannot be accepted and the sources of these requests must be prevented from making any more requests. Eventually, this requires that the processor be temporarily frozen. |
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In interleaved memory, the modules usually are not all equally congestedindeed, some could even be idle while others are heavily congested. In such a situation, it is advantageous to maximize the number of requests made by the processor, in the hope that the additional references will be to relatively idle modules and will lead to a net increase in the achieved bandwidth. |
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The problems with logical dependencies between memory references are exacerbated when the processor is frozen due to memory request buffers filling up; the next request that would have been made had the buffer not been full might have been one on which all the subsequent memory references are logically dependent. If maximizing the bandwidth of a parallel memory organization is the primary objective, it is desirable to provide buffering for memory requests up to the point at which the logical dependencies in the program become the limiting factor. |
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6.2.4 Partitioning of the Address Space |
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Another factor that can have a substantial effect upon the achieved memory bandwidth is the manner in which the memory space is partitioned across the memory modules. The objective is to partition the memory space in such a manner that the references made by the processor are equally distributed across the memory modules, leading to fairly uniform (and preferably low) congestion at all the modules rather than heavy congestion at some modules with relatively low utilization of the remaining ones. The trouble with uneven congestion is that only a subset of the modules is being referenced. Thus, the memory system has an effective bandwidth corresponding to a much smaller number of modules than are physically present. |
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Most frequently, the partitioning strategy is based on the premise that successive references tend to be to successive memory locations. So, succes- |
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