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Single-line WACs have been used in the VAX 8800 [96], while NCR has used multiline WACs in its workstations. |
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Generally temporal locality seems to play a more important role in write traffic than spatial localityan issue that the designer must carefully consider in developing a write strategy and an overall integrated design of a hierarchical memory system. |
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5.14 Cache References per Instruction |
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Instructions create three types of cache traffic: |
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The cache-memory traffic depends on whether the cache has an "allocate on write" policy or not. The processor-cache traffic is the sum of these types of traffic, since writes must be checked in the cache directory regardless of allocation strategy. |
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5.14.1 Instruction Traffic |
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In determining the amount of traffic that a typical instruction creates, there are a number of factors that must be considered: |
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1. The size of the I-fetch data path and the use of an I-buffer. |
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3. The distribution of data reads and writes. |
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4. The use of instructions that create multiple data accesses to memory (such as load multiple, etc.). |
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Statistically, each instruction requires I/P fetches, where I is the average instruction size in bytes, and P is the data path width (physical word size) from cache to I buffer. We assume that P ³ I as this is the usual case. Branch instructions add additional instruction traffic depending upon the branch policy followed. Usually, the branch instruction policy creates an additional fetch to the target instruction, even if untaken. Depending upon the branch strategy, the branch may create further traffic by fetching instructions in anticipation of a predicted branch path outcome. Each of these additional instructions requires I/P fetches. Total instruction traffic per instruction is the sum of I/P and the excess of instructions fetched on branches: |
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