| Table 5.4 Common types of cache. |
|
| Type | Where Usually Used |
| Integrated (or "unified") | The DTMR cache/common processor cache |
| Split cache I and D | Provides additional cache access bandwidth at some loss of MR. Commonly used as an on-chip L/S processor cache. |
| Sectored cache | Improves area effectiveness (MR for given area) for on-chip cache. |
| Two (multiple) level cache | First level is usually on-chip, second level is usually much larger than first and reduces time delay in a first-level miss. |
| Write assembly cache | Specialized; reduces write traffic; usually used with a WT on-chip first-level cache. |