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Figure 5.15
Some selected reported miss rates for 8-kbyte caches using
16-byte lines. (Data from machines cited in Figure 5.12 and
[240] for 1989.) |
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How is memory updated on a write? One could write to both cache and memory (write-through), or write only to the cache (copyback), updating memory when the line is replaced. These two strategies are the basic cache write policies (Figure 5.16). |
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The write-through cache (Figure 5.16a) stores into both cache and main memory on each CPU store. |
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Advantage: this retains a consistent (up-to-date) image of program activity in memory. |
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Disadvantage: memory bandwidth may be highdominated by write traffic. |
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In the copyback cache (Figure 5.16b), the entire line is stored in main memory on replacement if a write has occurred to that line (a dirty line). |
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1. Dirty bit is set if a write occurs anywhere in line. |
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2. From various traces [259], the probability that a line to be replaced is dirty is 47% on average (ranging from 22% to 80%). |
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3. Rule of thumb: half of the data lines replaced are dirty. So, for a data cache assume 50% are dirty lines and for an integrated cache assume 30% are dirty lines. |
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1. Write-through In a write-through policy, a write is directed at both the cache and the main memory for every CPU store. This has the advantage of maintaining a consistent (up-to-date) image of program activity in main memory. It has the disadvantage of increasing memory traffic for large caches, as those caches with low read-miss rates may now find the memory traffic to be dominated by the write traffic. |
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