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guessing target vs. in-line paths on branch. The guessed path proceeds up to EX (but no out-of-order execution) until the CC is set. Assuming a scientific environment and an R/M processor, we want to create a guess strategy based on opcode type and CC mode tested (i.e., identify unconditional (BCs). We then compute the actual (weighted) branch penalty (CPI) based on the created strategy, and compare it to a simple "choose in-line" strategy. An in-line strategy means if there is a choice, choose in-line. There is no choice on unconditional branches. |
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The BCR and BALR (Table 1.14) with target address already in a register take the equivalent of only one cycle of AG (actually a general-purpose register to PSW transfer cycle). |
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In order to find the fraction of each branch instruction that uses an AG as a percent of all instructions, we compute a frequency for each instruction class. For example, BRs and BCs are computed as 72.5% (Table 3.10) times 82.6% (branches that use AG, Table 3.10) times 15% (Table 3.4)this is split into two categories by the data in Table 3.10. |
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| Opcode | % of Instr | % Taken | BRR | uncond | 0.4 | 54% | BCR | cond | 1.5 | 54% | | | 1.9 | | BR | uncond | 1.8 | 100% | BC | cond | 7.2 | 54% | | | 9.0 | | BALR | | 0.5 | 100% | BAL | | 2.1 | 100% | Loop Control | 1.5 | 91% |
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(a) For BRR (unconditional) or for BALR (one-cycle AG, address is in register): |
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Target penalty = 3 cycles |
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(b) For BCR (true conditional): |
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If we guess in-line and go in-line, we have: |
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