|
|
|
| Table 3.12 Centered branch table in bytes. | | Size (bytes) | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | |
|
|
|
|
|
|
den on the memory system. Many of these prefetched instructions represent wasted fetches even if the target is correctly captured, as they are "skipped over." |
|
|
|
|
|
|
|
|
In the next chapter, we study branch table buffers in more detail, but from Figure 3.5, Tables 3.11 and 3.12, and obvious implementation considerations, only relatively small tables ought to be considered practical. |
|
|
|
|
|
|
|
|
3.4.4 Condition Code Testing |
|
|
|
|
|
|
|
|
In many architectures, the conditional branch instructions test the state of a condition code in order to determine whether or not a branch should be taken. Since not all instructions modify the condition code, it is possible for the code to be set many instructions prior to the execution of a branch and not be altered in the interim. (Instructions such as LD usually do not affect the CC.) A processor can make use of early knowledge of the condition code to reduce the amount of work that the processor must perform. (See study 5.3.) If the condition code is already known at the time that a conditional branch instruction is decoded, the processor may be able to resolve the branch at decode time rather than at execution time. This allows the processor to treat the branch as either unconditionally taken or not taken. There is no need to prefetch instructions from both paths, and there is no chance that a wrong branch guess will require excess prefetching of instructions. Table 3.13 shows the length of this interval of condition code setting for various mixes. |
|
|
|
|
|
|
|
|
The relatively small intervals available indicate that early condition code setting (and similar techniques discussed in this chapter) have limited effectiveness and that effectiveness is probably in the scientific environment. |
|
|
|
|
|