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while in R/M we might have:
d87111c01013bcda00bb8640fdff6754.gif
LD.W    R1, B
ADD.W   R1, C
ST.W    A, R1.
Finally, for R+M, we could have:
d87111c01013bcda00bb8640fdff6754.gif
ADD.W   A, B, C.
The data presented in Table 3.4 are presented as the occurrence per 100 HLL operations and as a percentage of all instructions for that particular architecture. Thus, in the R/M architecture, we expect 87 move-type instructions to be executed per 100 HLL operations, and these 87 operations represent 48% of a total of 180 instructions executed per 100 HLL source operations.
Certain Gibson classes of instructions (branch and floating point) are invariant across architectures and appear to be invariant across compilers also. Fixed-point add, shift, compare, and logical are presented here as being invariant, but in practice they are heavily influenced by the compiler, especially when the compiler does machine-dependent optimizations such as replacing 2 * x with a left shift of x. Fortunately, from a performance evaluation point of view, these instructions are largely interchangeablethey all require use of an ALU and usually take about the same amount of ALU time to execute. They have similar instruction timing and similar access requirements to memory.
Since R/M and R+M both include memory-to-memory operations for commercial data types, they are largely indistinguishable in commercial applications. Differences that arise due to address arithmetic are ignored here. One should note the relatively high occurrence of the branch classification in these commercial applications (R/M and R+M).
Most currently available L/S architectures (as well as some R/M microprocessors) do not have direct support for moving character strings or for operating on variable-length decimal operands. However, there may be support for loading a character into a register or single-digit decimal arithmetic operations. Since data on such machines in commercial applications is not generally available, the information presented in Table 3.5 for L/S is synthetic. It represents a straightforward mapping of the available commercial environment data for other architectures to the L/S, assuming interpretive code to execute string and decimal operations. The high incidence of move (characters) is a reflection of the occurrence of move characters in commercial-type applications and the expectation that this instruction moves a field of about 32 characters. In this interpretive model, the branch occurrence is not commensurately affected. Thus, the commercial L/S data provided here is not measured data; it is a simple projection on the L/S architecture of available data for other architectures and should be used with care.

 
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